It is necessary for non-volatile memories to verify that data is being correctly written into the memory cells. Present non-volatile memories use an external shadow memory, flip flops, microprocessor's memory and/or additional databus elements to store/transfer data that was written to the page latch and then a normal Flash Macro/EEPROM read is performed to compare the read data against the page latch data from the shadow memory or flip flops.
Unfortunately, the external shadow memory, flip flops and/or databus elements require additional silicon area and control logic for storage/transmission of page latch data. This adds to the cost and complexity of the memory chip.
To test for page address uniqueness and page latch functionality present systems write the memory cells through the page latches and then read back in the normal read mode for functionality verification.
Checking for page latch functionality by writing the memory cells takes a very long time (in the order of tens of milliseconds) due to long high voltage cycles required for writing the memory.
Thus there exists a need for a non-volatile memory system that does not require additional circuitry to verify that data is being correctly written and that does not require a long time to check the page latch functionality of a chip.